M16C65 Datasheet, PDF (791/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
31. Precautions
31.11 Notes on Programmable I/O Ports
Note
P1, P4_4 to P4_7, P7_2 to P7_5, and P9_1 of the 80-pin package have no external connections.
Program the direction bits of these ports to 1 (output mode) and the output data to 0 (low level).
For the 80-pin and 100-pin packages, do not access the addresses of registers P11 to P14, PD11
to PD14 and PUR3.
31.11.1 Influence of the SD Input
If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is 1 (three-
phase output forcible cutoff by input on the SD pin enabled), pins P7_2 to P7_5 and P8_0 and P8_1 go
to the high-impedance state.
31.11.2 Influence of SI/O3 and SI/O4
Setting the SM32 bit in the S3C register to 1 causes the P9_2 pin to go to the high-impedance state.
Similarly, setting the SM42 bit in the S4C register to 1 causes the P9_6 pin to go to the high-impedance
state.
31.11.3 100-Pin Package
Do not access to the addresses assigned to registers P11 to P14 and the PUR register.
31.11.4 80-Pin Package
Do not access to the addresses assigned to registers P11 to P14 and the PUR register.
Set the direction bits of the ports corresponding to P1, P4_4 to P4_7, P7_2 to P7_5 and P9_1 to 1
(output mode). Set the output data to 0 (low-level signal).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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