M16C65 Datasheet, PDF (283/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
14. Interrupts
14.9 NMI Interrupt
An NMI interrupt is generated when input to the NMI pin changes state from high to low. The NMI interrupt
is a non-maskable interrupt. To use the NMI interrupt, set the PM24 bit in the PM2 register to 1 (NMI
function). The NMI input uses the digital filter. Refer to 13. “Programmable I/O Ports” for the digital filter.
Figure 14.10 shows NMI Interrupt Block Diagram.
NMIDF2 to NMIDF0 ^PM24
NMI
Digital filter
NMI interrupt
NMIDF2 to NMIDF0 : Bits in the NMIDF register
PM24
: Bit in the PM2 register
Figure 14.10 NMI Interrupt Block Diagram
14.10 Key Input Interrupt
If the PCR7 bit in the PCR register is 0 (KI0 to KI3 key input enabled), set bits PD10_4 to PD10_7 in the
PD10 register to 0 (input). When input to any pin from P10_4 to P10_7 becomes low, the IR bit in the
KUPIC register becomes 1 (key input interrupt request). When using any pin from KI0 to KI3 for the key
input interrupt, do not use all four pins AN4 to AN7 as analog input pins. While input to any pin from
P10_4 to P10_7 is low, inputs to all other pins of the port are not detected as interrupts.
Key input interrupts can be used as a key-on wake up function for getting the MCU out of wait or stop
mode.
Figure 14.11 shows Block Diagram of Key Input Interrupt.
Pull-up
transistor
PU25 bit
in the PUR2 register
PD10_7 bit
in the PD10 register
PD10_7 bit in the PD10 register
KI3
Pull-up
transistor
KI2
Pull-up
transistor
KI1
Pull-up
transistor
KI0
PD10_6 bit
in the PD10 register
PD10_5 bit
in the PD10 register
PD10_4 bit
in the PD10 register
PCR7 bit
in the PCR register
Figure 14.11 Block Diagram of Key Input Interrupt
Key input interrupt request
(IR bit in the KUPIC register)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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