English
Language : 

M16C65 Datasheet, PDF (709/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
27. A/D Converter
27.4.4 Repeat Sweep Mode 0
In repeat sweep mode 0, the analog voltage applied to selected pins is repeatedly converted to a digital
code. Table 27.11 shows the Repeat Sweep Mode 0 Specifications.
Table 27.11 Repeat Sweep Mode 0 Specifications
Item
Function
A/D conversion start
conditions
A/D conversion stop
condition
Interrupt request
generation timing
Analog input pin
Reading of A/D conversion
result
Specification
Bits SCAN1 to SCAN0 in the ADCON1 register and bits ADGSEL1 to
ADGSEL0 in the ADCON2 register are used to select pins. Analog voltage
applied to the pins is repeatedly converted to a digital code.
• When the TRG bit in the ADCON0 register is 0 (software trigger)
the ADST bit in the ADCON0 register is set to 1 (A/D conversion start).
• When the TRG bit is 1 (ADTRG trigger)
input level at the ADTRG pin changes from high to low after the ADST bit
is set to 1 (A/D conversion start).
Set the ADST bit to 0 (A/D conversion stop).
No interrupt requests generated
Select from AN0 and AN1 (2 pins), AN0 to AN3 (4 pins), AN0 to AN5 (6
pins), and AN0 to AN7 (8 pins).
AN0_0 to AN0_7 and AN2_0 to AN2_7 can be selected in the same way.
Read the registers among AD0 to AD7 that corresponds to the selected
pins.
27.4.4.1 A/D Control Register 0 (ADCON0) (In Repeat Sweep Mode 0)
A/D Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
11
Symbol
ADCON0
Address
03D6h
After Reset
0000 0XXXb
Bit Symbol
Bit Name
Function
RW
CH0
RW
CH1 Analog input pin select bit Invalid in repeat sweep mode 0
RW
CH2
RW
MD0
MD1
A/D operation mode select
bit 0
b4
1
b3
1 : Repeat sweep mode 0 or
repeat sweep mode 1
RW
RW
TRG Trigger select bit
0 : Software trigger
1 : ADTRG trigger
RW
ADST
A/D conversion start flag
0 : A/D conversion stop
1 : A/D conversion start
RW
CKS0 Frequency select bit 0
Refer to the CKS0 bit in the ADCON0
register
RW
If the ADCON0 register is rewritten during A/D conversion, the conversion result is undefined.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 674 of 791