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M16C65 Datasheet, PDF (93/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
6. Resets
6. Resets
6.1 Introduction
The following resets can be used to reset the MCU: hardware reset, power-on reset, voltage monitor 0
reset, voltage monitor 1 reset, voltage monitor 2 reset, oscillation stop detection reset, watchdog timer reset,
and software reset.
Table 6.1 lists the Types of Resets, Figure 6.1 shows the Reset Circuit Block Diagram, and Table 6.2 lists
the I/O Pins.
Table 6.1 Types of Resets
Reset Name
Hardware reset
Power-on reset
Voltage monitor 0 reset
Voltage monitor 1 reset
Voltage monitor 2 reset
Oscillation stop detection reset
Watchdog timer reset
Software reset
Trigger
A low-level signal is applied to the RESET pin.
The rise of the voltage on VCC1
The drop of the voltage on VCC1 (reference voltage: Vdet0)
The drop of the voltage on VCC1 (reference voltage: Vdet1)
The drop of the voltage on VCC1 (reference voltage: Vdet2)
The main clock oscillator stop is detected.
Watchdog timer underflows.
Setting the PM03 bit in the PM0 register to 1
RESET
Hardware reset
VCC1
Power-on reset Power-on reset
circuit
Voltage monitor 0 reset
Voltage
Voltage monitor 1 reset
detection circuit Voltage monitor 2 reset
Watchdog timer reset
Watchdog timer
CPU
Software reset
Oscillation stop/
XIN
re-oscillation
detection circuit Oscillation stop reset
This diagram shows that reset signals are output to SFRs.
Refer to 4. SFR for values after reset.
Figure 6.1 Reset Circuit Block Diagram
SFR
VCR1 register
VCR2 register
VW0C register
VWCE register
Bits VW1C2 and VW1C3
in the VW1C register
Bits VW2C2 and VW2C3
in the VW2C register
Bits PM00 and PM01
in the PM0 register
SFR
Bits CM20, CM21, and CM27
in the CM2 register
Pins, CPU, or SFR not listed above
Table 6.2
I/O Pin
RESET
VCC1
I/O Pins
I/O Type
Input
Input
Function
Hardware reset input
Power input. The power-on reset, voltage monitor 0 reset, voltage monitor
1 reset, and voltage monitor 2 reset are generated by monitoring VCC1.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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