M16C65 Datasheet, PDF (73/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
4. Special Function Registers (SFRs)
4. Special Function Registers (SFRs)
4.1 SFRs
An SFR is a control register for a peripheral function. Table 4.1 to Table 4.15 list SFR information.
Table 4.1 SFR Information (1/16) ⁽¹⁾
Address
0000h
0001h
0002h
0003h
0004h
Processor Mode Register 0
Register
0005h
0006h
0007h
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
0019h
001Ah
Processor Mode Register 1
System Clock Control Register 0
System Clock Control Register 1
Chip Select Control Register
External Area Recovery Cycle Control Register
Protect Register
Data Bank Register
Oscillation Stop Detection Register
Program 2 Area Control Register
External Area Wait Control Expansion Register
Peripheral Clock Select Register
Clock Prescaler Reset Flag
Reset Source Determine Register
Voltage Detection 2 Circuit Flag Register
Voltage Detection Circuit Operation Enable Register
001Bh
001Ch
001Dh
001Eh
001Fh
Chip Select Expansion Control Register
PLL Control Register 0
Processor Mode Register 2
Symbol
After Reset
PM0
PM1
CM0
CM1
CSR
EWR
PRCR
DBR
CM2
0000 0000b (CNVSS pin is low)
0000 0011b (CNVSS pin is high) ⁽²⁾
0000 1000b
0100 1000b
0010 0000b
01h
XXXX XX00b
00h
00h
0X00 0010b ⁽³⁾
PRG2C
EWC
PCLKR
CPSRF
RSTFR
VCR1
VCR2
CSE
PLC0
PM2
XXXX XX00b
00h
0000 0011b
0XXX XXXXb
XX00 001Xb (hardware reset) ⁽⁴⁾
0000 X000b ⁽²⁾
000X 0000b ^{(2), (5)}
001X 0000b ^{(2), (6)}
00h
0X01 X010b
XX00 0X01b
Notes:
1.
2.
3.
4.
5.
6.
X: Undefined
The blank areas are reserved. No access is allowed.
Software reset, watchdog timer reset, oscillation stop detection reset, voltage monitor 1 reset, and voltage monitor 2 reset do not affect the
following bits: Bits PM01 and PM00 in the PM0 register, VCR1 register, and VCR2 register.
Oscillation stop detection reset does not affect bits CM20, CM21, and CM27.
The state of bits in the RSTFR register depends on a reset type.
When the LVDAS bit of address OFS1 is 1 at hardware reset
This value shows the value after any of the following resets.
- Voltage monitor 0 reset
- When the LVDAS bit of address OFS1 is 0 at hardware reset
- Power-on reset
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 38 of 791