M16C65 Datasheet, PDF (252/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
13. Programmable I/O Ports
Table 13.7 Unassigned Pin Handling in Memory Expansion Mode and Microprocessor Mode
Pin Name
Connection ⁽²⁾
Ports P0 to P5, P12,
P13
One of the following:
• Set to input mode and connect a pin to VSS via a resistor (pull-down)
• Set to input mode and connect a pin to VCC2 via a resistor (pull-up)
• Set to output mode and leave the pins open ^{(1), (3)}
Ports P6 to P11, P14
One of the following:
• Set to input mode and connect a pin to VSS via a resistor (pull-down)
• Set to input mode and connect a pin to VCC1 via a resistor (pull-up)
• Set to output mode and leave the pins open ^{(1), (4)}
BHE, ALE, HLDA,
XOUT ⁽⁵⁾, BCLK ⁽⁶⁾
HOLD , RDY
Open
Connect to VCC2 via a resistor (pull-up)
XIN
Connect to VCC1 via a resistor (pull-up)
AVCC
Connect to VCC1
AVSS, VREF
Connect to VSS
Notes:
1.
2.
3.
4.
5.
6.
When setting a port to output mode and leaving it open, be aware that the port remains in input mode until it
is switched to output mode by a program after reset. For this reason, the voltage level on the pin becomes
undefined, causing the power supply current to increase while the port remains in input mode.
Furthermore, since the contents of the direction registers could be changed by noise or noise-induced loss of
control, it is recommended that the contents of the direction registers be regularly reset in software to
improve the reliability of the program.
Make sure the unassigned pins are connected with the shortest possible wiring from the MCU pins
(maximum 2 cm).
If the CNVSS pin has the VSS level applied to it, these pins are set as input ports until the processor mode is
switched by a program after reset. For this reason, the voltage levels on these pins become undefined,
causing the power supply current to increase while they remain set as input ports.
Ports P7_0, P7_1, and P8_5 are N-channel open-drain outputs.
When ports P7_0, P7_1, and P8_5 are set to output mode, make sure a low-level signal is output from the
pins.
This applies when an external clock is input to the XIN pin or when VCC1 is connected via a resistor.
If the PM07 bit in the PM0 register is set to 1 (BCLK not output), connect this pin to VCC2 via a resistor
(pulled high).
MCU
Ports P6 to P14
(Input mode)
.
.
.
(Input mode)
(Output mode)
XIN
BHE
HLDA
ALE
XOUT
BCLK
HOLD
RDY
.
.
.
Open
VCC1
Open
VCC2
VCC1
AVCC
AVSS
VREF
Memory expansion mode or
microprocessor mode
VSS
Figure 13.14 Unassigned Pin Handling in Memory Expansion Mode and Microprocessor Mode
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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