M16C65 Datasheet, PDF (580/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
Table 23.25 Registers Used and Settings in SIM Mode
Register
Bits
Function
U2TB ⁽¹⁾
0 to 7
Set transmission data.
U2RB ^{(1) 0 to 7}
Reception data can be read.
OER,FER,PER,SUM Error flag
U2BRG
0 to 7
Set bit rate.
U2MR
SMD2 to SMD0
Set to 101b.
CKDIR
Select the internal clock or external clock.
STPS
Set to 0.
PRY
Set to 1 in direct format or 0 in inverse format.
PRYE
Set to 1.
IOPOL
Set to 0.
U2C0
CLK0,CLK1
Select the count source for the U2BRG register.
CRS
Invalid because CRD is 1
TXEPT
Transmit register empty flag
CRD
Set to 1.
NCH
Set to 0.
CKPOL
Set to 0.
UFORM
Set to 0 in direct format or 1 in inverse format.
U2C1
TE
Set to 1 to enable transmission.
TI
Transmit buffer empty flag
RE
Set to 1 to enable reception.
RI
Reception complete flag
U2IRS
Set to 1.
U2RRM
Set to 0.
U2LCH
Set to 0 in direct format or 1 in inverse format.
U2ERE
Set to 1.
U2SMR ^{(1) 0 to 3}
Set to 0.
U2SMR2 0 to 7
Set to 0.
U2SMR3 0 to 7
Set to 0.
U2SMR4 0 to 7
Set to 0.
Note:
1. Set the bits not listed above to 0 when writing to the registers in SIM mode.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 545 of 791