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M16C65 Datasheet, PDF (177/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
9. Power Control
When the MCU exits wait mode by hardware reset, voltage monitor 0 reset, voltage monitor 1 reset,
voltage monitor 2 reset, watchdog timer reset, NMI interrupt, voltage monitor 1 interrupt, or voltage
monitor 2 interrupt, set bits ILVL2 to ILVL0 in peripheral function interrupt to 000b (interrupt disabled)
before executing the WAIT instruction.
When the MCU exits wait mode by peripheral function interrupts, make the following settings before
executing a WAIT instruction:
(1) Set the interrupt priority level of bits ILVL2 to ILVL0 in the interrupt control register for peripheral
function interrupts which are used to exit wait mode.
Set bits ILVL2 to ILVL0 in all other interrupt control registers, for peripheral function interrupts not
used to exit wait mode, to 000b (interrupt disabled).
(2) Set the I flag to 1.
(3) Start operating the peripheral functions used to exit wait mode.
When exiting wait mode by means of an interrupt, an interrupt routine is performed after an interrupt
request is generated, and then the CPU clock is supplied again.
When the MCU exits wait mode by an interrupt, the CPU clock is the same CPU clock used while
executing the WAIT instruction.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 142 of 791