M16C65 Datasheet, PDF (70/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
3. Address Space
3. Address Space
3.1 Address Space
The M16C/65 Group has a 1 Mbyte address space from address 00000h to FFFFFh. Address space is
expandable to 4 Mbytes with the memory capacity-enhancing feature. Address 40000h to BFFFFh can be
used as external areas from bank 0 to bank 7. Figure 3.1 shows Address Space. The accessible area
depends on processor mode and control bit status.
Address space
1 Mbyte
Memory expand mode
00000h
00400h
SFR
Internal RAM
Internal RAM is allocated from
address 00400h to higher.
04000h
0D000h
0D800h
0E000h
10000h
14000h
27000h
28000h
Reserved area
External area
SFR
External area
Internal ROM
(data flash)
Internal ROM
(program ROM2)
External area
Reserved area
When data flash is enabled
When program ROM 2
is enabled
In 4-Mbyte mode
Bank 7
Bank 6
Bank 5
Bank 4
Bank 3
Bank 2
External area
40000h
Bank 1
Bank 0
D0000h
Reserved area
BFFFFh
512 Kbytes × 8
FFFFFh
Internal ROM
(program ROM1)
Program ROM 1 is allocated from
address FFFFFh to lower.
Notes:
1. Do not access reserved areas.
2. The figure above applies under the following conditions:
- The PM13 bit in the PM1 register is set to 0
(addresses from 04000h to 0CFFFh and from 80000h to CFFFFh are used as external areas)
- The IRON bit in the PRG2C register is set to 0
(addresses from 40000h to 7FFFFh are used as an external area)
Figure 3.1 Address Space
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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