M16C65 Datasheet, PDF (20/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

22.2.7 PMCi Header Pattern Set Register (MIN) (PMCiHDPMIN) (i = 0, 1)
PMCi Header Pattern Set Register (MAX) (PMCiHDPMAX) (i = 0, 1) ..... 456
22.2.8
PMCi Data 0 Pattern Set Register (MIN) (PMCiD0PMIN) (i = 0, 1)
PMCi Data 0 Pattern Set Register (MAX) (PMCiD0PMAX) (i = 0, 1)
PMCi Data 1 Pattern Set Register (MIN) (PMCiD1PMIN) (i = 0, 1)
PMCi Data 1 Pattern Set Register (MAX) (PMCiD1PMAX) (i = 0, 1) ...... 457
22.2.9 PMCi Measurements Register (PMCiTIM) (i = 0, 1) ................................ 458
22.2.10 PMCi Counter Value Register (PMCiBC) (i = 0, 1) .................................. 458
22.2.11 PMC0 Receive Bit Count Register (PMC0RBIT)...................................... 458
22.2.12 PMC0 Receive Data Store Register i (PMC0DATi) (i = 0 to 5) ............ 459
22.2.13 PMC0 Compare Control Register (PMC0CPC)........................................ 460
22.2.14 PMC0 Compare Data Register (PMC0CPD) ............................................ 461
22.3 Operations....................................................................................................... 462
22.3.1 Common Operations in Multiple Modes ................................................... 462
22.3.2 Pattern Match Mode (PMC0 and PMC1 Operate Individually) ................. 464
22.3.3 Pattern Match Mode (Connected Operation of PMC0 and PMC1)........... 471
22.3.4 Input Capture Mode (PMC0 and PMC1 Operate Individually).................. 476
22.3.5 Input Capture Mode (Simultaneous Count Operation of PMC0 and PMC1)
.................................................................................................................. 480
22.4 Interrupt ........................................................................................................... 483
22.5 Notes on Remote Control Signal Receiver...................................................... 486
22.5.1 Start/Stop of PMCi .................................................................................... 486
22.5.2 Register Reading Procedure .................................................................... 486
23. Serial Interface UARTi (i = 0 to 2, 5 to 7) ............................................. 487
23.1 Introduction...................................................................................................... 487
23.2 Registers ......................................................................................................... 492
23.2.1 UART Clock Select Register (UCLKSEL0)............................................... 494
23.2.2 Peripheral Clock Select Register (PCLKR) ............................................. 494
23.2.3 UARTi Transmit Buffer Register (UiTB) (i = 0 to 2, 5 to 7)........................ 495
23.2.4 UARTi Receive Buffer Register (UiRB) (i = 0 to 2, 5 to 7) ........................ 496
23.2.5 UARTi Bit Rate Register (UiBRG) (i = 0 to 2, 5 to 7) ................................ 498
23.2.6 UARTi Transmit/Receive Mode Register (UiMR) (i = 0 to 2, 5 to 7) ......... 498
23.2.7 UARTi Transmit/Receive Control Register 0 (UiC0) (i = 0 to 2, 5 to 7)..... 499
23.2.8 UARTi Transmit/Receive Control Register 1 (UiC1) (i = 0 to 2, 5 to 7)..... 501
23.2.9 UART Transmit/Receive Control Register 2 (UCON) ............................... 503
23.2.10 UARTi Special Mode Register (UiSMR) (i = 0 to 2, 5 to 7) ....................... 504
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