M16C65 Datasheet, PDF (193/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
Figure 10.1 shows Memory Map in Single-Chip Mode.
10. Processor Mode
00000h
00400h
Single-Chip Mode
SFR
Internal RAM
XXXXXh
0D000h
0D800h
0E000h
10000h
14000h
YYYYYh
Reserved area
SFR
Reserved area
Internal ROM ⁽²⁾
(data flash)
Internal ROM ⁽³⁾
(program ROM 2)
Reserved area
FFFFFh
Internal ROM
(program ROM 1)
Address XXXXXh
PM13 bit in PM1 register
RAM size 12 Kbytes
20 Kbytes
31 Kbytes
47 Kbytes
0
033FFh
03FFFh
03FFFh
03FFFh
1
033FFh
053FFh
07FFFh
0BFFFh
Address YYYYYh
IRON bit in PRG2C register
0
PM13 bit in PM1 register
0
1
Program
ROM 1
size
128 Kbytes
256 Kbytes
384 Kbytes
E0000h
D0000h
D0000h
E0000h
C0000h
A0000h
512 Kbytes D0000h 80000h
640 Kbytes D0000h 80000h
768 Kbytes D0000h 80000h
0
Do not set
Do not set
Do not set
Do not set
Do not set
Do not set
1
1
E0000h
C0000h
A0000h
80000h
60000h
40000h
Notes :
1. If the PM13 bit is 0, 15 Kbytes of internal RAM and 192 Kbytes of internal ROM can be used.
2. Data flash can be used when the PM10 bit in the PM1 register is 1 (0E000h to 0FFFFh are used as data flash).
3. Program ROM 2 can be used when the PRG2C0 bit in the PRG2C register is 0 (program ROM 2 enabled).
Figure 10.1 Memory Map in Single-Chip Mode
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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