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M16C65 Datasheet, PDF (247/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
13.3.7 Port Pi Direction Registers (PDi) (i = 0 to 14)
13. Programmable I/O Ports
Port Pi Direction Register (i = 0 to 13)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PD0 to PD3
PD4 to PD7
PD8 to PD11
PD12 to PD13
Address
03E2h, 03E3h, 03E6h, 03E7h
03EAh, 03EBh, 03EEh, 03EFh
03F2h, 03F3h, 03F6h, 03F7h
03FAh, 03FBh
Bit Symbol
Bit Name
PDi_0
PDi_1
PDi_2
PDi_3
PDi_4
PDi_5
PDi_6
PDi_7
Port Pi_0 direction bit
Port Pi_1 direction bit
Port Pi_2 direction bit
Port Pi_3 direction bit
Port Pi_4 direction bit
Port Pi_5 direction bit
Port Pi_6 direction bit
Port Pi_7 direction bit
Function
0 : Input mode
(Functions as an input port)
1 : Output mode
(Functions as an output port)
After Reset
00h
00h
00h
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
Port P14 Direction Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PD14
Address
03FEh
After Reset
XXXX XX00b
Bit Symbol
Bit Name
Function
RW
PD14_0 Port P14_0 direction bit
0 : Input mode
RW
(Functions as an input port)
PD14_1 Port P14_1 direction bit
1 : Output mode
(Functions as an output port)
RW
—
(b7-b2)
No register bit. If necessary, set to 0. Read as undefined value
—
Write to the PD9 register in the next instruction after setting the PRC2 bit in the PRCR register to 1
(write enabled).
These registers select whether I/O ports are to be used for input or output. Each bit in the PDi register
has its corresponding port.
In memory expansion mode or microprocessor mode, the PDi register for the pins functioning as bus
control pins (A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA,
and BCLK) cannot be modified (Writing a value has no effect).
Registers PD11 to PD14 are enabled when the PU37 bit in the PUR3 register is 1 (P11 to P14 enabled).
Access to registers PD11 to PD14 after setting the PU37 bit to 1. When the PU37 bit in the PUR3
register is 0 (P11 to P14 disabled), the contents of registers PD11 to PD14 are retained. In this case,
read as undefined value.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 212 of 791