M16C65 Datasheet, PDF (355/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
17.3.6 Pulse Width Modulation (PWM) Mode
In PWM mode, the timer outputs pulses of a given width in succession. The counter functions as either
16-bit pulse width modulator or 8-bit pulse width modulator. Table 17.14 lists Specifications of PWM
Mode. Table 17.15 lists Registers and the Setting in PWM Mode. Figure 17.11 and Figure 17.12 show
Operation Example in 16-Bit Pulse Width Modulation Mode and Operation Example in 8-Bit Pulse
Width Modulation Mode, respectively.
Table 17.14 Specifications of PWM Mode
Item
Count source
Count operations
16-bit PWM
Specification
f1TIMAB, f2TIMAB, f8TIMAB, f32TIMAB, f64TIMAB, fOCO-F, fOCO-S, fC32
• Decrement (operating as an 8-bit or a 16-bit pulse width modulator)
• The timer reloads a new value at a rising edge of PWM pulse and continues counting.
• The timer is not affected by a trigger that occurs during counting.
• Pulse width ^n--
n
fj
8-bit PWM
• Cycle time -⁽--2----¹--⁶----^–-----1----⁾
fj
n: set value of the TAi register
fj: count source frequency
• Pulse width
n_-----×_-----(_---m_------+_-----1_----)
fj
2¹⁶ - 1
n × (m + 1)
Count start condition
Count stop condition
Interrupt request
generation timing
TAiIN pin function
TAiOUT pin function
Read from timer
Write to timer
Selectable functions
i = 0 to 4
(2⁸ - 1) × (m + 1)
• Cycle time ⁽---²---⁸-----–----¹----⁾---^×-----⁽---^m------⁺-----¹----⁾
fj
m: set value of the TAi register low-order address
n: set value of the TAi register high-order address
fj: count source frequency
• The TAiS bit of the TABSR register is set to 1 (start counting).
• The TAiS bit is 1 and external trigger input from the TAiIN pin
• The TAiS bit is 1 and one of the following external triggers occurs
Timer B2 overflow or underflow
Timer Aj overflow or underflow (j = i - 1, except j = 4 if i = 0)
Timer Ak overflow or underflow (k = i + 1, except k = 0 if i = 4)
The TAiS bit is set to 0 (stop counting).
On the falling edge of the PWM pulse
I/O port or trigger input
Pulse output
An indeterminate value is read by reading the TAi register.
• When not counting
Value written to the TAi register is written to both reload register and counter.
• When counting
Value written to the TAi register is written to only reload register
(transferred to counter when reloaded next).
• Output polarity control
The output polarity of TAiOUT pin is inverted. (While the TAiS bit is set to 0 (stop
counting), the pin outputs a high-level signal.)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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