M16C65 Datasheet, PDF (339/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
17. Timer A
Table 17.7 Registers and the Setting in Timer Mode ⁽¹⁾
Register
Bit
Setting
PCLKR
PCLK0
Select the count source.
CPSRF
CPSR
Write a 1 to reset the clock prescaler.
TCKDIVC0
TCDIV00
Select a clock used prior to timer AB frequency dividing.
PWMFS
PWMFSi
Set to 0.
TACS0 to TACS2 7 to 0
Select the count source.
TAPOFS
POFSi
Select the output polarity when the MR0 bit in the TAiMR register
is 1 (pulse output).
TAi1
7 to 0
- (does not need to be set)
TABSR
TAiS
Set to 1 when starting counting.
Set to 0 when stopping counting.
ONSF
TAiOS
Set to 0.
TAZIE
Set to 0.
TAiTGH to TAiTGL Set to 00b.
TRGSR
TAiTGH to TAiTGL Set to 00b.
UDF
TAiUD
Set to 0.
TAiP
Set to 0.
TAi
7 to 0
Set the counter value.
TAiMR
7 to 0
Refer to the following TAiMR register.
i = 0 to 4
Note:
1. This table does not describe a procedure.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 304 of 791