M16C65 Datasheet, PDF (622/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
25.2.8 I2C0 Control Register 2 (S4D0)
25. Multi-Master I²C-bus Interface
I2C0 Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
S4D0
Address
02B7h
After Reset
00b
Bit Symbol
Bit Name
Function
RW
TOE
Timeout detect function
enable bit
0: Disabled
1: Enabled
RW
TOF Timeout detect flag
0: Not detected
1: Detected
RO
TOSEL
Timeout detect time select bit
0: Long time
1: Short time
RW
ICK2
b5 b4 b3
0 0 0: Bits ICK1 and ICK0 in the S3D0
RW
register are enabled
ICK3
I2C-bus system clock select
bit
0 0 1: fIIC divided by 2.5
0 1 0: fIIC divided by 3
RW
0 1 1: fIIC divided by 5
ICK4
1 0 0: fIIC divided by 6
RW
Do not set other than the above values.
MSLAD Slave address compare bit
0: S0D0 register only
1: Registers S0D0 to S0D2
RW
SCPIN
Stop condition detect interrupt 0: I²C-bus interrupt not requested
request bit
1: I²C-bus interrupt requested
RW
TOE (Timeout Detect Function Enable Bit) (b0)
The TOE bit enables the timeout detect function. Refer to 25.3.9 “Timeout Detection” for details.
TOF (Timeout Detect Flag) (b1)
The TOF bit is enabled when the TOE is set to 1. When the TOF bit is set to 1 (detected), the IR bit in
the IICIC register is set to 1 (requested) at the same time.
Condition to become 0:
• The ES0 bit in the S1D0 register is set to 0 (I²C interface disabled).
• The IHR bit in the S1D0 register is set to 1 (I²C interface reset).
Condition to become 1:
• The BB bit in the S10 register is set to 1 (bus busy) and the SCLMM high period is greater than the
timeout detect period.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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