M16C65 Datasheet, PDF (203/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
11. Bus
11.3.5 External Bus Control
The following describes the signals needed for accessing external devices and the functionality of
software wait states.
11.3.5.1 Address Bus
The address bus consists of 20 lines: A0 to A19. The address bus width can be set to 12, 16, or 20
bits using the PM06 bit in the PM0 register, and the PM11 bit in the PM1 register. Table 11.5 lists the
Set Value of Bits PM06 and PM11 and the Corresponding Address Bus Widths.
Table 11.5 Set Value of Bits PM06 and PM11 and the Corresponding Address Bus Widths
Bit Set Value ⁽¹⁾
Pin Function
PM11 = 1
P3_4 to P3_7
PM06 = 1
P4_0 to P4_3
PM11 = 0
A12 to A15
PM06 = 1
P4_0 to P4_3
PM11 = 0
A12 to A15
PM06 = 0
A16 to A19
Note:
1. Only the values listed above can be set.
Address Bus Width
12 bits
16 bits
20 bits
When the processor mode is changed from single-chip mode to memory expansion mode, the
address bus is undefined until an external area is accessed.
11.3.5.2 Data Bus
When input to the BYTE pin is high (8-bit width), eight lines (D0 to D7) comprise the data bus. When
input to the BYTE pin is low (16-bit width), 16 lines (D0 to D15) comprise the data bus.
Do not change the input level to the BYTE pin.
11.3.5.3 Chip Select Signal
The chip select signals (hereafter referred to as CS) are output from the CSi (i = 0 to 3) pin. These
pins can be set to function as I/O ports or as CS using the CSi bit in the CSR register.
In 1-Mbyte mode, the external area can be separated into a maximum of four spaces by the CSi
signal. In 4-Mbyte mode, a CSi signal or bank number is output from the CSi pin. Refer to 12.
“Memory Space Expansion Function”. Figure 11.2 shows Examples of Address Bus and CSi Signal
Output in 1-Mbyte Mode.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 168 of 791