M16C65 Datasheet, PDF (138/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
8.2.2 System Clock Control Register 0 (CM0)
8. Clock Generator
System Clock Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CM0
Address
0006h
After Reset
0100 1000b
Bit Symbol
Bit Name
Function
RW
CM00
b1 b0
Clock output function select bit 0 0 : I/O port P5_7
(valid in single-chip mode
0 1 : Output fC
RW
CM01 ^only)
1 0 : Output f8
1 1 : Output f32
CM02
Wait mode peripheral
function clock stop bit
0 : Peripheral function clock f1 does not
stop in wait mode
1 : Peripheral function clock f1 stops in
RW
wait mode
CM03
XCIN-XCOUT drive capacity 0 : Low
select bit
1 : High
RW
CM04 Port XC select bit
0 : I/O ports
1 : XCIN-XCOUT oscillation function
RW
CM05 Main clock stop bit
0 : On
1 : Off
RW
CM06
Main clock division
select bit 0
0 : CM16 and CM17 enabled
1 : Divide-by-8 mode
RW
0 : Main clock, PLL clock or on-chip
CM07 System clock select bit
oscillator clock
RW
1 : Sub-clock
Rewrite the CM0 register after setting the PRC0 bit in the PRCR register to 1 (write enabled).
Refer to Table 9.3 “Clock Related Bit Setting and Modes” to select a clock and a mode.
CM01-CM00 (Clock Output Function Select Bit) (b1-b0)
The CLKOUT pin outputs can be selected. These bits are enabled when the PCLK5 bit in the PCLKR
register is set to 0 (bits CM01 to CM00 enabled) in single-chip mode. When the PCLK5 bit is 1, set bits
CM01 to CM00 to 00b. Table 8.4 shows CLKOUT Pin Functions for Single-Chip Mode.
Table 8.4 CLKOUT Pin Functions for Single-Chip Mode
PCLKR Register
CM0 Register
PCLK5 bit
CM01 bit
CM00 bit
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Only set the combinations listed above.
I/O port
Output fC
Output f8
Output f32
Output f1
CLKOUT Pin Output
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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