M16C65 Datasheet, PDF (387/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
18. Timer B
Event Counter Mode
Timer Bi Mode Register (i = 0 to 5)
b7 b6 b5 b4 b3 b2 b1 b0
01
Symbol
TB0MR to TB2MR
TB3MR to TB5MR
Bit Symbol
Bit Name
Address
033Bh to 033Dh
031Bh to 031Dh
Function
After Reset
00XX 0000b
00XX 0000b
RW
TMOD0
b1 b0
RW
Operation mode select bit 0 1 : Event counter mode
TMOD1
RW
b3 b2
MR0
0 0 : Counts falling edges of external
RW
signal
Count polarity select bit 0 1 : Counts rising edges of external signal
MR1
1 0 : Counts falling and rising edges of an
external signal
RW
1 1 : Do not set
—
No register bit. If necessary, set to 0. Read as undefined value
—
MR3
Write 0 in event counter mode.
Read as undefined value in event counter mode
RO
TCK0
Invalid in event counter mode.
Set 0 or 1
RW
TCK1 Event clock select
0 : Input from TBiIN pin
1 : TBj overflow or underflow
RW
(j = i – 1; however, j = 2 if i = 0, j = 5 if i = 3)
MR1-MR0 (Count Polarity Select Bit) (b3-b2)
Valid when the TCK1 bit is 0 (input from TBiIN pin). If the TCK1 bit is 1 (TBj overflow or underflow),
these bits can be set to 0 or 1.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 352 of 791