M16C65 Datasheet, PDF (166/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
9.2.2 Flash Memory Control Register 2 (FMR2)
9. Power Control
Flash Memory Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
FMR2
Address
0222h
After Reset
XXXX 0000b
Bit Symbol
Bit Name
Function
RW
—
(b1-b0)
Reserved bits
Set to 0
RW
FMR22
Slow read mode enable
bit
0 : Disabled
1 : Enabled
RW
FMR23
Low current consumption 0 : Disabled
read mode enable bit
1 : Enabled
RW
—
(b7-b4)
No register bits. If necessary, set to 0. Read as undefined value
—
FMR22 (Slow Read Mode Enable Bit) (b2)
This bit enables mode which reduces the amount of current consumption when reading the flash
memory. When rewriting the flash memory (CPU rewrite mode), set the FMR22 bit to 0 (slow read
mode disabled).
Slow read mode can be used when f(BCLK) is 5 MHz or below. When f(BCLK) is above 5 MHz, set the
FMR22 bit to 0 (slow read mode disabled).
To set the FMR22 bit to 1, write 0 and then 1 in succession. Make sure no interrupts or DMA transfers
occur before writing 1 and after writing 0.
Set the FMR23 bit to 1 (low current consumption read mode enabled) after the FMR22 bit is set to 1
(slow read mode enabled). Also, set the FMR22 bit to 0 (slow read mode disabled) after the FMR23 bit
is set to 0 (slow read mode disabled). Do not change the FMR22 bit and FMR23 bit at the same time.
FMR23 (Low Current Consumption Read Mode Enable Bit) (b3)
When this bit is enabled, the slow read mode reduces the amount of current consumption when reading
the flash memory. When rewriting the flash memory (CPU rewrite mode), set the FMR23 bit to 0 (slow
read mode disabled).
Low current consumption read mode can be used when the CM07 bit in the CM0 register is 1 (sub
clock used as CPU clock). When the CM07 bit is 0, set the FMR23 bit to 0 (slow read mode disabled).
To set the FMR23 bit to 1, write 0 and then 1 in succession. Make sure no interrupts or DMA transfers
occur before writing 1 and after writing 0.
Set the FMR23 bit to 1 (low current consumption read mode enabled) after the FMR22 bit is set to 1
(slow read mode enabled). Also, set the FMR22 bit to 0 (slow read mode disabled) after the FMR23 bit
is set to 0 (slow read mode disabled). Do not change bits FMR22 and FMR23 at the same time.
When the FMR23 bit is 1, do not set the FMSTP bit in the FMR0 register to 1 (flash memory stopped).
Also, when the FMSTP bit is 1, do not set the FMR23 bit to 1.
When the FMR23 bit in the FMR2 register is 1 (low current consumption read mode enabled), do
not enter wait mode or stop mode. To enter wait mode or stop mode, set the FMR23 bit to 0 (low current
consumption read mode disabled) before entering.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 131 of 791