M16C65 Datasheet, PDF (71/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
3. Address Space
3.2 Memory Map
Special Function Registers (SFRs) are allocated from address 00000h to 003FFh and from 0D000h to
0D7FFh. Peripheral function control registers are located here. All blank spaces within SFRs are reserved,
and should not be accessed by the user.
Internal RAM is allocated from address 00400h and higher, with 10 Kbytes of internal RAM addressed from
00400h to 02BFFh. Internal RAM is used not only for data storage, but also for the stack area when
subroutines are called or when an interrupt request is acknowledged.
The internal ROM is flash memory. Three internal ROM areas are available: data flash, program ROM 1,
and program ROM 2.
The data flash is addressed from 0E000h to 0FFFFh. This data flash space is used not only for data
storage, but also for program storage.
Program ROM 2 is assigned addresses 10000h to 13FFFh. Program ROM 1 is assigned addresses FFFFFh
and lower, with the 64-Kbyte program ROM 1 space addressed to F0000h to FFFFFh.
The special page vectors are assigned addresses FFE00h to FFFD7h. They are used for the JMPS instruction
and JSRS instruction. Refer to the M16C/60, M16C/20, M16C/Tiny Series Software Manual for details.
The fixed vector table for interrupts is assigned addresses FFFDCh to FFFFFh.
The 256 bytes beginning with the start address set in the INTB register compose the relocatable vector table
for interrupts.
Figure 3.2 shows the Memory Map.
Internal RAM
Size Address XXXXXh
00000h
00400h
XXXXXh
12 Kbytes 033FFh
SFR
Internal RAM
Reserved area
20 Kbytes
31 Kbytes
47 Kbytes
053FFh
07FFFh
0BFFFh
0D000h
0D800h
0E000h
10000h
14000h
SFR
External area
Internal ROM
(data flash)
Internal ROM
(program ROM 2)
External area
13800h
13FF0h
13FFFh
On-chip debugger
monitor area
User boot code area
27000h
28000h
Reserved area
Program ROM 1
Size Address YYYYYh
128 Kbytes E0000h
40000h
256 Kbytes C0000h
384 Kbytes
512 Kbytes
A0000h
80000h
YYYYYh
640 Kbytes 60000h
768 Kbytes 40000h
FFFFFh
External area
Reserved area
Internal ROM
(program ROM 1)
Relocatable vector table
256 bytes beginning with the
start address set in the INTB
register
FFE00h
Special page vector table
FFFD8h
Reserved area
FFFDCh
Fixed vector table
Address for ID code stored
FFFFFh
OFS1 address
Notes:
1. Do not access reserved areas.
2. The figure above applies under the following conditions:
- Memory expansion mode
- The PM10 bit in the PM1 register is set to 1
(addresses from 0E000h to 0FFFFh are used as data flash)
- The PRG2C0 bit in the PRG2C register is set to 0 (program ROM 2 enabled)
- The PM13 bit in the PM1 register is set to 1
(the entire internal RAM and entire program ROM 1 from address 80000h are usable)
- The IRON bit in the PRG2C register is set to 1
(program ROM 1 addresses from 40000h to 7FFFFh enabled)
Figure 3.2 Memory Map
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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