M16C65 Datasheet, PDF (197/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
11.2.2 Chip Select Expansion Control Register (CSE)
11. Bus
Chip Select Expansion Control Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
CSE
Address
001Bh
After Reset
00h
Bit Symbol
Bit Name
CSE00W
CS0 wait expansion bit
CSE01W
CSE10W
CS1 wait expansion bit
CSE11W
CSE20W
CS2 wait expansion bit
CSE21W
CSE30W
CS3 wait expansion bit
CSE31W
Function
RW
b1 b0
0 0 : 1 wait (1φ + 1φ)
RW
0 1 : 2 waits (1φ + 2φ)
1 0 : 3 waits (1φ + 3φ)
1 1 : Select wait states by bits EWC01 _RW
and EWC00 in the EWC register
b3 b2
0 0 : 1 wait (1φ + 1φ)
RW
0 1 : 2 waits (1φ + 2φ)
1 0 : 3 waits (1φ + 3φ)
1 1 : Select wait states by bits EWC11 _RW
and EWC10 in the EWC register
b5 b4
0 0 : 1 wait (1φ + 1φ)
RW
0 1 : 2 waits (1φ + 2φ)
1 0 : 3 waits (1φ + 3φ)
1 1 : Select wait states by bits EWC21 _RW
and EWC20 in the EWC register
b7 b6
0 0 : 1 wait (1φ + 1φ)
RW
0 1 : 2 waits (1φ + 2φ)
1 0 : 3 waits (1φ + 3φ)
1 1 : Select wait states by bits EWC31 _RW
and EWC30 in the EWC register
Set the CSiW bit (i = 0 to 3) in the CSR register to 0 (wait state) before writing to bits CSEi1W to
CSEi0W. To set the CSiW bit to 1 (no wait state), set bits CSEi1W to CSEi0W to 00b first, and then set
the CSiW bit to 1.
Do not set bits CSEi1W and CSEi0W to 11b for a multiplexed bus area.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 162 of 791