M16C65 Datasheet, PDF (169/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
9. Power Control
Table 9.2 Clocks in Normal Operating Mode
Mode
CPU Clock
High-speed
mode
Medium-speed
mode
Main clock
divided by 1
(1)
Main clock
divided by n
(1)
f1
Main clock divided by 1
Peripheral Clocks
fC, fC32
fOCO-S
fOCO-F
fOCO40M
Enabled Enabled Enabled
(2)
(3)
(4)
PLL operating
mode
40 MHz on-
chip oscillator
mode
125 kHz on-
chip oscillator
mode
125 kHz on-
chip oscillator
low power
mode
Low-speed
mode
PLL clock
divided by n
(1)
fOCO-F
divided by n
(1)
fOCO-S
divided by n
(1)
fOCO-S
divided by n
(1)
fC
PLL clock divided by 1
fOCO-F divided by 1
fOCO-S divided by 1
fOCO-S divided by 1
Enabled Enabled Enabled
(2)
(3)
Enabled Enabled Enabled
(2)
(4)
Enabled Enabled Disabled
(2)
Any of the following:
Enabled Enabled Enabled
Main clock divided by 1
(3)
(4)
(when the CM21 is 0 and the CM11 is 0) ⁽⁵⁾
PLL clock divided by 1
(when the CM21 is 0 and the CM11 is 1) ⁽⁶⁾
fOCO-F divided by 1
(when the CM21 is 1 and the FRA01 is 1)
(4)
fOCO-S divided by 1
(when the CM21 is 0 and the FRA01 is 0)
(3)
Low power
fC
mode
fOCO-S divided by 1
Enabled Enabled Disabled
(when the CM21 is 1 and the FRA01 is 0)
(3)
(3)
CM11 : Bit in the CM1 register
CM21 : Bit in the CM2 register
FRA01 : Bit in the FRA0 register
Notes:
1. Select by using the CM06 bit in the CM0 register and bits CM17 to CM16 in the CM1 register.
2. When the fC is supplied.
3. When the fOCO-S is supplied.
4. When the fOCO40M and fOCO-F are supplied.
5. When the main clock is supplied.
6. When the PLL clock is supplied.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 134 of 791