M16C65 Datasheet, PDF (757/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
30. Flash Memory
30.8.6 EW0 Mode
The MCU enters CPU rewrite mode when the FMR01 bit in the FMR0 register is set to 1 (CPU rewrite
mode enabled) and is ready to accept commands. EW0 mode is selected by setting the FMR60 bit in
the FMR6 register to 0. Figure 30.9 shows Setting and Resetting of EW0 Mode
Software commands control programming and erasing. The FMR0 register or status register indicates
whether a program or erase operation is completed as expected or not.
Procedure to Enter EW0 Mode
Single-chip mode or memory
expansion mode
Transfer the rewrite control program to an area other
than flash memory
Set registers CM0, CM1, and PM1
Jump to the rewrite control program transferred to an
area other than the flash memory. (In the following
steps, use the rewrite control program in an area
other than the flash memory)
Rewrite control program
Set the FMR01 bit to 0, and then 1 (CPU rewrite mode
enabled).
Set the FMR11 bit to 1 (FMR6 register write enabled),
then set the FMR6 register to 02h (EW0 mode),
and then set the FMR11 bit to 0 (FMR6 register write disabled).
Execute the software commands
Execute the read array command
Set the FMR01 bit to 0
(CPU rewrite mode disabled)
Jump to the desired address in the flash memory
Figure 30.9 Setting and Resetting of EW0 Mode
Do not execute the following instructions:
UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction.
The following are interrupts which can be used in EW0 mode and operations when the interrupts occur
during auto-erase operation or auto-program operation:
• Maskable interrupt (suspend disabled)
To use the interrupt, allocate a variable vector table in areas other than the flash memory.
• Maskable interrupt (suspend enabled)
To use the interrupt, allocate a variable vector table in areas other than the flash memory.
When the FMR00 bit in the FMR0 register is checked in the interrupt routine and the result is 0
(being written or erased), auto-erase operation or auto-program operation suspends after td(SR-
SUS) elapses by setting the FMR31 bit in the FMR3 register to 1 (suspend request). Auto-erase
operation or auto-program operation restarts by setting the FMR31 bit to 0 (command restart) at
the completion of the interrupt.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 722 of 791