M16C65 Datasheet, PDF (549/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
23. Serial Interface UARTi (i = 0 to 2, 5 to 7)
23.3.1.4 Continuous Receive Mode
In continuous receive mode, receive operation is enabled when the receive buffer register is read. It
is not necessary to write dummy data to the transmit buffer register to enable receive operation in this
mode. However, a dummy read of the receive buffer register is required when starting the operating
mode.
When the UiRRM bit (i = 0 to 2, 5 to 7) is 1 (continuous receive mode), the TI bit in the UiC1 register
is set to 0 (data present in the UiTB register) by reading the UiRB register. In this case (UiRRM bit =
1), do not write dummy data to the UiTB register by a program.
When using an external clock, read the UiRB register between the eighth bit of data is received and
the next transmission starts.
Figure 23.8 shows Operation Example in Continuous Receive Mode.
When using an external clock,
read the UiRB register during this period.
When using an external clock,
read the UiRB register during this period.
CLKi
RXDi
D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6
D7
D0 D1 D2
i = 0 to 2, 5 to 7
D7 received Next transmission starts.
D7 received Next transmission starts.
The above applies under the following conditions.
- The CKPOL bit in the UiC0 register is 0 (receive data input at the falling edge of the transmit/receive clock).
- The UFORM bit in the UiC0 register is 0 (LSB first).
- The CKDIR bit in the UiMR register is 1 (external clock).
Figure 23.8 Operation Example in Continuous Receive Mode
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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