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M16C65 Datasheet, PDF (145/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60
Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
8.2.6 PLL Control Register 0 (PLC0)
8. Clock Generator
PLL Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
PLC0
Address
001Ch
After Reset
0X01 X010b
Bit Symbol
Bit Name
Function
RW
PLC00
PLC01
PLL multiplying factor
select bit
PLC02
—
(b3)
Reserved bit
b2 b1 b0
0 0 0 : Do not set
RW
0 0 1 : Multiply-by-2
0 1 0 : Multiply-by-4
0 1 1 : Multiply-by-6
RW
1 0 0 : Multiply-by-8
1 0 1:
1 1 0 : Do not set these values
RW
1 1 1:
Read as undefined value
RO
PLC04
PLC05
Reference frequency counter
set bit
b5 b4
0 0 : No division
0 1 : Divide-by-2
1 0 : Divide-by-4
1 1 : Do not set
RW
RW
—
(b6)
No register bit. If necessary, set to 0. Read as undefined value
—
PLC07 Operation enable bit
0 : PLL off
1 : PLL on
RW
Rewrite the PLC0 register after setting the PRC0 bit in the PRCR register to 1 (write enabled).
PLC02-PLC00 (PLL Multiplying Factor Select Bit) (b2-b0)
Write to bits PLC00 to PLC02 when the PLC07 bit is 0 (PLL off).
When the PM21 bit in the PM2 register is 1 (clock change disabled), writing to bits PLC02 to PLC00 has
no effect.
PLC05-PLC04 (Reference Frequency Counter Set Bit) (b5-b4)
Write to bits PLC05 to PLC04 when the PLC07 bit is 0 (PLL off).
When the PM21 bit in the PM2 register is 1 (clock change disabled), writing to bits PLC05 to PLC04 has
no effect.
PLC07 (Operation Enable Bit) (b7)
When the PM21 bit in the PM2 register is 1 (clock change disabled), writing to the PLC07 bit has no
effect.
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 110 of 791