M16C65 Datasheet, PDF (282/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
14. Interrupts
14.8 INT Interrupt
The INTi interrupt (i = 0 to 7) is triggered by the edges of external inputs. The edge polarity is selected
using the IFSRi bit in the IFSR register, or the IFSR30 or IFSR31 bit in the IFSR3A register.
The INT4 and INT5 each share an interrupt vector and interrupt control register with SI/O3 and SI/O4,
respectively. To use the INT4 interrupt, set the IFSR6 bit in the IFSR register to 1 (INT4). To use the INT5
interrupt, set the IFSR7 bit in the IFSR register to 1 (INT5).
After modifying the IFSR6 or IFSR7 bit, set the corresponding IR bit to 0 (interrupt not requested) before
enabling the interrupt.
To use the INT6 interrupt, set the PCR5 bit in the PCR register to 0 (INT6 input enabled). To use the INT7
interrupt, set the PCR6 bit in the PCR register to 0 (INT7 input enabled).
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
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