M16C65 Datasheet, PDF (224/829 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M16C/60

Under development
M16C/65 Group
Preliminary Specification
This is a preliminary specification and is subject to change.
12. Memory Space Expansion Function
Memory expansion mode where PM13 is 0
ROM address
000000h
040000h
080000h
0C0000h
100000h
140000h
180000h
Data only
1C0000h
200000h
240000h
280000h
2C0000h
300000h
340000h
Program
or data
Program
or data
380000h
3C0000h
3FFFFFh
MCU address
OFS bit in DBR OFS bit in DBR
register = 0
register = 1
40000h
bank 0
(512 Kbytes)
BFFFFh
40000h
bank 1
(512 Kbytes)
BFFFFh
40000h
bank 2
(512 Kbytes)
BFFFFh
40000h
bank 3
(512 Kbytes)
BFFFFh
40000h
bank 4
(512 Kbytes)
BFFFFh
40000h
bank 5
(512 Kbytes)
BFFFFh
40000h
bank 6
(512 Kbytes)
BFFFFh
40000h
bank 7
(512 Kbytes)
BFFFFh
40000h
bank 0
(512 Kbytes)
BFFFFh
40000h
bank 1
(512 Kbytes)
BFFFFh
40000h
bank 2
(512 Kbytes)
BFFFFh
40000h
bank 3
(512 Kbytes)
BFFFFh
40000h
bank 4
(512 Kbytes)
BFFFFh
40000h
bank 5
(512 Kbytes)
BFFFFh
40000h
bank 6
(512 Kbytes)
BFFFFh
Bank
Number ^OFS
0
0
1
0
1
1
0
2
1
0
3
1
0
4
1
0
5
1
0
6
1
70
Access
Area
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
BFFFFh
40000h
7FFFFh
80000h
BFFFFh
C0000h
CFFFFh
D0000h
DFFFFh
D0000h
DFFFFh
Output from the MCU Pins
CS Output
Address Output
CS3 CS2 CS1 A19 A18 A17 A16 A15 to A0
0
0
0
0
1
0
0 0000h
000000h
0
0
0
1
0
1
1 FFFFh
0
0
0
1
0
0
0 0000h
07FFFFh
040000h
0
0
1
0
1
1
1 FFFFh
0BFFFFh
0
0
1
0
1
0
0 0000h
080000h
0
0
1
1
0
1
1 FFFFh
0FFFFFh
0
0
1
1
0
0
0 0000h
0C0000h
0
1
0
0
1
1
1 FFFFh
13FFFFh
0
1
0
0
1
0
0 0000h
100000h
0
1
0
1
0
1
1 FFFFh
17FFFFh
0
1
0
1
0
0
0 0000h
140000h
0
1
1
0
1
1
1 FFFFh
1BFFFFh
0
1
1
0
1
0
0 0000h
180000h
0
1
1
1
0
1
1 FFFFh
1FFFFFh
0
1
1
1
0
0
0 0000h
1C0000h
1
0
0
0
1
1
1 FFFFh
23FFFFh
1
0
0
0
1
0
0 0000h
200000h
1
0
0
1
0
1
1 FFFFh
27FFFFh
1
0
0
1
0
0
0 0000h
240000h
1
0
1
0
1
1
1 FFFFh
2BFFFFh
1
0
1
0
1
0
0 ^0000h
280000h
1
0
1
1
0
1
1 FFFFh
2FFFFFh
1
0
1
1
0
0
0 ^0000h
2C0000h
1
1
0
0
1
1
1 FFFFh
33FFFFh
1
1
0
0
1
0
0 ^0000h
300000h
1
1
0
1
0
1
1 FFFFh
37FFFFh
1
1
0
1
0
0
0 ^0000h
340000h
1
1
1
0
1
1
1 FFFFh
1
1
1
0
1
0
0 0000h
3BFFFFh
380000h
1
1
1
0
1
1
1 FFFFh
1
1
1
1
0
0
0 0000h
3BFFFFh
3C0000h
1
1
1
1
0
1
1 FFFFh
1
1
1
1
1
0
0 0000h
3FFFFFh
3C0000h
1
1
1
1
1
0
0 FFFFh
3CFFFFh
Internal ROM access
Internal ROM access
Internal ROM access
Internal ROM access
A21 A20 A19 A18 N.C. A17 A16 A15 to A0
Address input for 4-Mbyte ROM
4-Mbyte ROM
access area
Figure 12.6 Relationship between Addresses in 4-Mbyte ROM and Those in MCU (1/3)
REJ09B0484-0030 Rev.0.30 Sep 09, 2008
Page 189 of 791