SH7615 Datasheet, PDF (94/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Addressing Instruction
Mode
Format Effective Addresses Calculation
Equation
Indirect
@(R0,
indexed GBR GBR)
addressing
The effective address is the GBR value plus the R0 GBR + R0
GBR
+
GBR + R0
R0
PC relative
addressing
with
displacement
@(disp:8,
PC)
The effective address is the PC value plus an
Word: PC + disp
8-bit displacement (disp). The value of disp is zero- × 2
extended, is doubled for a word operation, and is
Longword: PC &
quadrupled for a longword operation. For a longword _{H'FFFFFFFC +}
operation, the lowest two bits of the PC value are _{disp × 4}
masked
PC
(for longword)
&
H'FFFFFFFC
+
disp
(zero-extended)
×
PC + disp × 2
or
PC&H'FFFFFFFC
+ disp × 4
2/4
Rev. 2.00, 03/05, page 56 of 884