SH7615 Datasheet, PDF (665/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Transfer
direction
Serial clock
Serial data
Bit 7 Bit 0
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
RDF
ORER
RXI interrupt
request
Data read from SCFRDR
and RDF flag cleared to 0
by RXI interrupt handler
RXI interrupt
request
One frame
ERI interrupt
request due
to overrun error
Figure 14.21 Example of SCIF Receive Operation (Example of LSB-First Transfer)
• Simultaneous Serial Data Transmission and Reception (Synchronous Mode)
Figure 14.22 shows a sample flowchart for simultaneous serial transmit and receive operations.
Use the following procedure for simultaneous serial data transmit and receive operations after
enabling the SCIF for transmission and reception.
Rev. 2.00, 03/05, page 627 of 884