SH7615 Datasheet, PDF (801/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

18.2 Register Configuration
Table 18.2 shows the PFC registers.
Table 18.2 Register Configuration
Name
Port A control register
Port A I/O register
Port B control register
Port B I/O register
Port B control register 2
Abbreviation R/W
PACR
R/W
PAIOR
R/W
PBCR
R/W
PBIOR
R/W
PBCR2
R/W
Initial Value
H'0000
H'0000
H'0000
H'0000
H'0000
Address
H'FFFFFC80
H'FFFFFC82
H'FFFFFC88
H'FFFFFC8A
H'FFFFFC8E
Access Size
8, 16
8, 16
8, 16
8, 16
8, 16
18.3 Register Descriptions
18.3.1 Port A Control Register (PACR)
Bit: 15
—
Initial value: 0
R/W: R
14
13
12
11
10
9
8
— PA13MD PA12MD PA11MD PA10MD PA9MD PA8MD
0
0
0
0
0
0
0
R
R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
PA7MD PA6MD PA5MD PA4MD PA3MD PA2MD PA1MD PA0MD
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The port A control register (PACR) is a 16-bit read/write register that selects the functions of the
14 multiplex pins in port A.
PACR is initialized to H'0000 by a power-on reset. It is not initialized by a manual reset or in
standby mode or sleep mode.
Bits 15 and 14—Reserved: These bits are always read as 0. The write value should always be 0.
Rev. 2.00, 03/05, page 763 of 884