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SH7615 Datasheet, PDF (167/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7600 Series | |||
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Table 4.3 (b) Exception Processing Vector Table (IRQ Mode)
Exception Source
Interrupt
IRQ0
IRQ1
IRQ2
IRQ3
On-chip
peripheral
module*3
Vector
Number
64*2
65*2
66*2
67*2
0*4
:
127*4
Vector Table Address
Offset
H'00000100âH'00000103
H'00000104âH'00000107
H'00000108âH'0000010B
H'0000010CâH'0000010F
H'00000000âH'00000003
:
H'000001FCâH'000001FF
Vector Addresses
Table 4.3 (c) Exception Processing Vector Table (IRL Mode)
Exception Source
Vector Vector Table Address
Number Offset
Vector Addresses
Interrupt
IRL1*1
IRL2*1
IRL3*1
IRL4*1
IRL5*1
IRL6*1
IRL7*1
IRL8*1
IRL9*1
IRL10*1
IRL11*1
IRL12*1
IRL13*1
IRL14*1
IRL15*1
On-chip
peripheral
module*3
64*2
65*2
66*2
67*2
68*2
69*2
70*2
71*2
0*4
:
127*4
H'00000100âH'00000103
H'00000104âH'00000107
VBR + (vector
number à 4)
H'00000108âH'0000010B
H'0000010CâH'0000010F
H'00000110âH'00000113
H'00000114âH'00000117
H'00000118âH'0000011B
H'0000011CâH'0000011F
H'00000000âH'00000003
:
H'000001FCâH'000001FF
Notes: 1. When 1110 is input to the , IRL3 , IRL2 , IRL1 and IRL0 pins, an IRL1 interrupt results.
When 0000 is input, an IRL15 interrupt results.
2. External vector number fetches can be performed without using the auto-vector
numbers in this table.
Rev. 2.00, 03/05, page 129 of 884
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