SH7615 Datasheet, PDF (467/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Bit 20—Transmit Descriptor Exhausted (TDE): Indicates that the transmission descriptor valid bit
(TACT) in the descriptor is not set when the E-DMAC reads the transmission descriptor when the
previous descriptor is not the last one of the frame for multiple- buffer frame processing. As a
result, an incomplete frame may be transmitted.
Bit 20: TDE
Description
0
“1” transmit descriptor active bit (TACT) detected
(Initial value)
1
“0” transmit descriptor active bit (TACT) detected (interrupt source)
Note: When transmission descriptor empty (TDE = 1) occurs, execute a software reset and initiate
transmission. In this case, the address that is stored in the transmit descriptor list address
register (TDLAR) is transmitted first.
Bit 19—Transmit FIFO Underflow (TFUF): Indicates that underflow has occurred in the transmit
FIFO during frame transmission. Incomplete data is sent onto the line.
Bit 19: TFUF
Description
0
Underflow has not occurred
(Initial value)
1
Underflow has occurred (interrupt source)
Note: Whether E-DMAC operation continues or halts after underflow is controlled by the E-DMAC
operation control register (EDOCR).
Bit 18—Frame Received (FR): Indicates that a frame has been received and the receive descriptor
has been updated. This bit is set to 1 each time a frame is received.
Note: The actual receive frame status is indicated in the receive status field in the descriptor.
Bit 18: FR
0
1
Description
Frame not received
Frame received (interrupt source)
(Initial value)
Bit 17—Receive Descriptor Exhausted (RDE): This bit is set if the receive descriptor active bit
(RACT) setting is “inactive” (RACT = 0) when the E-DMAC reads a receive descriptor.
Bit 17: RDE
Description
0
“1” receive descriptor active bit (RACT) detected
(Initial value)
1
“0” receive descriptor active bit (RACT) detected (interrupt source)
Note: When receive descriptor empty (RDE = 1) occurs, receiving can be restarted by setting
RACT = 1 in the receive descriptor and initiating receiving.
Rev. 2.00, 03/05, page 429 of 884