SH7615 Datasheet, PDF (614/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCIF clock
source and enable or disable clock output from the SCK pin. The combination of the CKE1 and
CKE0 bits determines whether the SCK pin functions as the serial clock output pin or the serial
clock input pin. The function of the SCK pin should be selected with the pin function controller
(PFC).
The setting of the CKE0 bit, however, is only valid for internal clock operation (CKE1 = 0) in
asynchronous mode. The CKE0 bit setting is invalid in synchronous mode and in the case of
external clock operation (CKE1 = 1). The CKE1 and CKE0 bits must be set before determining
the SCIF’s operating mode with SCSMR.
For details of clock source selection, see table 14.9 in section 14.3, Operation.
Bit 1:
CKE1
Bit 0:
CKE0
Description
0
0
Asynchronous mode Internal clock/SCK pin functions as input pin (input
signal ignored)^*1
Synchronous mode
Internal clock/SCK pin functions as serial clock
output^*1
1
Asynchronous mode Internal clock/SCK pin functions as clock output^*2
Synchronous mode Internal clock/SCK pin functions as serial clock
output
1
*
Asynchronous mode External clock/SCK pin functions as clock input^*3
Synchronous mode
External clock/SCK pin functions as serial clock
input
Notes: 1. Initial value
2. Outputs a clock with a frequency of 16/8/4 times the bit rate.
3. Inputs a clock with a frequency of 16/8/4 times the bit rate.
*: Don’t care
Rev. 2.00, 03/05, page 576 of 884