SH7615 Datasheet, PDF (698/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

• Automatic transfer of register data
 Block transfer, 1-word data transfer, and 1-byte data transfer possible by direct memory
access controller (DMAC) activation
Table 16.1 lists the functions of the TPU.
Table 16.1 TPU Functions
Item
Channel 0
Count clock
Pφ/1
Pφ/4
Pφ/16
Pφ/64
TCLKA
TCLKB
TCLKC
TCLKD
General registers
TGR0A
TGR0B
General registers/
buffer registers
TGR0C
TGR0D
I/O pins
TIOCA0
TIOCB0
TIOCC0
TIOCD0
Counter clear
function
TGR compare match
or input capture
Compare 0 output O
match
output
1 output O
Toggle O
output
Input capture
O
function
Synchronous
O
operation
PWM mode
O
Phase counting
—
mode
Buffer operation
O
Notes: O : Possible
— : Not possible
Channel 1
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/256
TCLKA
TCLKB
TGR1A
TGR1B
—
TIOCA1
TIOCB1
TGR compare match
or input capture
O
O
O
O
O
O
O
—
Channel 2
Pφ/1
Pφ/4
Pφ/16
Pφ/64
Pφ/1024
TCLKA
TCLKB
TCLKC
TGR2A
TGR2B
—
TIOCA2
TIOCB2
TGR compare match
or input capture
O
O
O
O
O
O
O
—
Rev. 2.00, 03/05, page 660 of 884