SH7615 Datasheet, PDF (428/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

9.2.7 Receive Frame Length Register (RFLR)
Bit: 31
30
29
...
19
18
17
16
—
—
—
...
—
—
—
—
Initial value: 0
0
0
...
0
0
0
0
R/W: R
R
R
...
R
R
R
R
Bit: 15
14
13
12
11
10
9
8
—
—
—
— RFL11 RFL10 RFL9 RFL8
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R/W R/W R/W R/W
Bit:
Initial value:
R/W:
7
RFL7
0
R/W
6
RFL6
0
R/W
5
RFL5
0
R/W
4
RFL4
0
R/W
3
RFL3
0
R/W
2
RFL2
0
R/W
1
RFL1
0
R/W
0
RFL0
0
R/W
This register specifies the maximum frame length (in bytes) that can be received by the SH7615
Bits 31 to 12—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 11 to 0—Receive Frame Length (RFL)
H'000 to H'5EE
1,518 bytes
H'5EF
1,519 bytes
H'5F0
...
1,520 bytes
...
H'7FF
2,047 bytes
H'800 to H'FFF
2,048 bytes
Notes: 1. The frame length refers to all fields from the destination address up to and including the
CRC data.
2. When data that exceeds the specified value is received, the part of the data that is
higher than the specified value is discarded.
Frame contents from the destination address up to and including the data are actually
transferred to memory. CRC data is not included in the transfer.
Rev. 2.00, 03/05, page 390 of 884