SH7615 Datasheet, PDF (617/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Bit 5—Transmit Data FIFO Empty (TDFE): Indicates that data has been transferred from the
transmit FIFO data register (SCFTDR) to the transmit shift register (SCTSR), the number of data
bytes in SCFTDR has fallen to or below the transmit trigger data number set by bits TTRG1 and
TTRG0 in the FIFO control register (SCFCR), and transmit data can be written to SCFTDR.
Bit 5: TDFE
Description
0
A number of transmit data bytes exceeding the transmit trigger set number
have been written to SCFTDR
[Clearing conditions]
• When transmit data exceeding the transmit trigger set number is written to
SCFTDR, and 0 is written to TDFE after reading TDFE = 1
• When transmit data exceeding the transmit trigger set number is written to
SCFTDR by the on-chip DMAC
1
The number of transmit data bytes in SCFTDR does not exceed the transmit
trigger set number
(Initial value)
[Setting conditions]
• In a reset or in standby mode
• When the number of SCFTDR transmit data bytes falls to or below the
transmit trigger set number as the result of a transmit operation*
Note: * As SCFTDR is a 16-byte FIFO register, the maximum number of bytes that can be
written when TDFE = 0 is {16 – (transmit trigger set number)}. Data written in excess of
this will be ignored. The number of data bytes in SCFTDR is indicated by the upper 8
bits of SCFDR.
Bit 4—Break Detect (BRK): Indicates that a receive data break signal has been detected.
Bit 4: BRK
Description
0
A break signal has not been received
(Initial value)
[Clearing conditions]
• In a reset or in standby mode
• When 0 is written to BRK after reading BRK = 1
1
A break signal has been received
[Setting condition]
When data with a framing error is received, and a framing error also occurs in
the next receive data (all space “0”)
Note: When a break is detected, transfer to SCFRDR of the receive data (H'00) following
detection is halted. When the break ends and the receive signal returns to mark “1”, receive
data transfer is resumed.
Rev. 2.00, 03/05, page 579 of 884