SH7615 Datasheet, PDF (619/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Bit 1: RDF
Description
0
The number of receive data bytes in SCFRDR is less than the receive trigger
set number
(Initial value)
[Clearing conditions]
• In a reset or in standby mode
• When SCFRDR is read until the number of receive data bytes in SCFRDR
falls below the receive trigger set number, and 0 is written to RDF after
reading RDF = 1
• When SCFRDR is read by the on-chip DMAC until the number of receive
data bytes in SCFRDR falls below the receive trigger set number
1
The number of receive data bytes in SCFRDR is equal to or greater than the
receive trigger set number
[Setting condition]
When SCFRDR contains at least the receive trigger set number of receive data
bytes
Note:
SCFRDR is a 16-byte FIFO register. When RDF = 1, at least the receive trigger set number
of data bytes can be read. If all the data in SCFRDR is read and another read is performed,
the data value will be undefined. The number of receive data bytes in SCFRDR is indicated
by the lower 8 bits of SCFDR.
Bit 0—Receive Data Ready (DR): Indicates that there are fewer than the receive trigger set
number of data bytes in the receive FIFO data register (SCFRDR), and no further data has arrived
for at least 16 etu after the stop bit of the last data received.
Bit 0: DR
Description
0
Reception is in progress or has ended normally and there is no receive data left
in SCFRDR
(Initial value)
[Clearing conditions]
• In a reset or in standby mode
• When 0 is written to DR after all the remaining receive data has been
read^*1
1
No further receive data has arrived, and SCFRDR contains fewer than the
receive trigger set number of data bytes
[Setting condition]
When SCFRDR contains fewer than the receive trigger set number of receive
data bytes, and no further data has arrived for at least 16 etu after the stop bit
of the last data received^*2
Notes: 1. All remaining receive data should be read before clearing the DR flag.
2. Equivalent to 1.6 frames when using an 8-bit, 1-stop-bit format.
etu: Elementary time unit = sec/bit
Rev. 2.00, 03/05, page 581 of 884