SH7615 Datasheet, PDF (727/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

16.4.2 Basic Functions
Counter Operation: When one of bits CST0 to CST2 is set to 1 in TSTR, the TCNT counter for
the corresponding channel starts counting. TCNT can operate as a free-running counter, periodic
counter, and so on.
• Example of count operation setting procedure
Figure 16.6 shows an example of the count operation setting procedure.
Operation selection
Select counter clock
1
Periodic counter
Select counter clearing source 2
Free-running counter
Select output compare register 3
Set period
4
1 Select the counter
clock with bits
TPSC2 to TPSC0 in
TCR. At the same
time, select the
input clock edge
with bits CKEG1
and CKEG0 in
TCR.
2 For periodic counter
operation, select
the TGR to be used
as the TCNT
clearing source with
bits CCLR2 to
CCLR0 in TCR.
3 Designate the TGR
selected in [2] as an
output compare
register by means
of TIOR.
Start count operation
<Periodic counter>
4 Set the periodic
5
Start count operation
5
counter cycle in the
TGR selected in (2).
<Free-running counter>
5 Set the CST bit in
TSTR to 1 to start
the count operation.
Figure 16.6 Example of Counter Operation Setting Procedure
Rev. 2.00, 03/05, page 689 of 884