SH7615 Datasheet, PDF (417/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Receive Controller: After a frame is received via the MII, the receive controller carries out
address information, frame length, CRC, and other checks, and the receive data is transferred to
memory by the receive E-DMAC. The main functions of the receive controller are as follows:
• Checking received frame format
• Checking receive frame CRC and frame length
• Transfer of own-address, multicast, or broadcast receive frames to memory
• Compliant with MII in IEEE802.3u standard
• Nibble-byte conversion supporting PHY-LSI speed
• Magic Packet monitoring
Command/Status Interface: This interface provides various command/status registers to control
the EtherC, and performs access to PHY-LSI internal registers via the MII.
Rev. 2.00, 03/05, page 379 of 884