SH7615 Datasheet, PDF (736/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

• When TGR is an input capture register
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 16.17.
Input capture
signal
Buffer register
Timer general
register
TCNT
Figure 16.17 Input Capture Buffer Operation
Example of Buffer Operation Setting Procedure: Figure 16.18 shows an example of the buffer
operation setting procedure.
Buffer operation
Select TGR function
Set buffer operation
Start count
1 Designate TGR as an input capture register or
output compare register by means of TIOR.
1
2 Designate TGR for buffer operation with bits
BFA and BFB in TMDR.
3 Set the CST bit in TSTR to 1 to start the count
2
operation.
3
<Buffer operation>
Figure 16.18 Example of Buffer Operation Setting Procedure
Rev. 2.00, 03/05, page 698 of 884