SH7615 Datasheet, PDF (844/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

CKIO
A24–A0
BS
CSn
RD/WR
RD
WEn ⋅
DQMxx
D31–D0
DACKn
T₁
T₂
t_AD
t_AD
t_AS
t_BSD
t_BSD
t_CSD1
t_CSD2
t_RWD
t_RWD
t_{RSD1 tRSD1}
t_WED1
t_WED1
t_RDS1
t_RDH2
t_DACD1
t_DACD2
WAIT
RAS
CAS ⋅
OE
CKE
Notes: 1. t_RDH2 is measured from the rise of CSn or RD, whichever comes first.
2. DACKn waveform when active-high is specified
Figure 21.12 Basic Read Cycle (No Wait)
Rev. 2.00, 03/05, page 806 of 884