SH7615 Datasheet, PDF (623/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Asynchronous mode:
Pφ
N=
64 × 2^2n–1 × B
× 10⁶ – 1 (When operating on a base clock of 16 times the bit rate)
Pφ
N=
32 × 2^2n–1 × B
× 10⁶ – 1 (When operating on a base clock of 8 times the bit rate)
Pφ
N=
16 × 2^2n–1 × B
× 10⁶ – 1 (When operating on a base clock of 4 times the bit rate)
Synchronous mode:
Pφ
N=
× 10⁶ – 1
8 × 2^2n–1 × B
Where B: Bit rate (bits/s)
N: SCBRR setting for baud rate generator (0 ≤ N ≤ 255)
Pφ: Peripheral module operating frequency (MHz)
n: Baud rate generator input clock (n = 0, 1, 2, or 3)
(See the table below for the relation between n and the clock.)
SCSMR Settings
n
Clock
CKS1
CKS0
0
Pφ
0
0
1
Pφ/4
1
2
Pφ/16
1
0
3
Pφ/64
1
The bit rate error in asynchronous mode is found from the following equations:
Error (%) =
Pφ × 10⁶
(N + 1) × B × 64 × 2^{2n–1 – 1 × 100}
(When operating on a base clock of 16 times the bit rate)
Error (%) =
Pφ × 10⁶
(N + 1) × B × 32 × 2^{2n–1 – 1 × 100}
(When operating on a base clock of 8 times the bit rate)
Error (%) =
Pφ × 10⁶
(N + 1) × B × 16 × 2^{2n–1 – 1 × 100}
(When operating on a base clock of 4 times the bit rate)
Rev. 2.00, 03/05, page 585 of 884