SH7615 Datasheet, PDF(47/925 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7600 Series

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SH7615 Datasheet, PDF (47/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH RISC engine Family/SH7600 Series

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Item

Serial communi-

cation interface

with FIFO (SCIF),

2 channels

Serial I/O (SIO),

3 channels

High-performance

user debugging

interface (H-UDI)

Specifications

â¢ Four interrupt sources

ï£§ Transmit FIFO data empty

ï£§ Break

ï£§ Receive FIFO data full

ï£§ Receive error

â¢ Built-in modem control functions (RTS, CTS)

â¢ Detection of transmit and receive FIFO register data quantity and number

of receive FIFO register transmit data errors

â¢ Timeout error (DR) can be detected during reception

â¢ Full-duplex operation (independent transmit and receive registers, and

independent transmit and receive clocks)

â¢ Transmit/receive ports with double-buffer structure (enabling continuous

transmission/reception)

â¢ Interval transfer mode and continuous transfer mode

â¢ Choice of 8- or 16-bit data length

â¢ Data transfer communication by means of polling or interrupts

â¢ MSB-first transfer between SIO and data I/O

â¢ Conforms to IEEE1149.1 standard

ï£§ Five test signals (TCK, TDI, TDO, TMS, ) TRST

ï£§ TAP controller

ï£§ Instruction register

ï£§ Data register

ï£§ Bypass register

â¢ Test mode that conforms to the IEEE1149.1 standard

ï£§ Standard instructions: BYPASS, SAMPLE/PRELOAD, and EXTEST

ï£§ Optional instructions: CLAMP, HIGHZ, and IDCODE

â¢ H-UDI interrupt

ï£§ H-UDI interrupt request to INTC

â¢ Reset hold

Rev. 2.00, 03/05, page 9 of 884

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