SH7615 Datasheet, PDF (57/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Type
Bus control
H-UDI
Ethernet
controller
(EtherC)
Symbol
A24 to A0
D31 to D0
TCK
TMS
I/O
Output
I/O
Input
Input
TDI
Input
TDO
Output
TRST
Input
ASEMODE^*1 Input
TX-CLK
Input
RX-CLK Input
TX-EN
Output
ETXD0 to
ETXD3
TX-ER
Output
Output
RX-DV
Input
ERXD0 to
ERXD3
RX-ER
Input
Input
CRS
COL
MDC
Input
Input
Output
MDIO
I/O
Name
Function
Address bus
Address output
Data bus
Data input/output
Test clock
Test clock input
Test mode
select
Test mode select input signal
Test data input Serial data input
Test data output Serial data output
Test reset
Test reset input signal
ASE mode input ASE mode/user mode select signal
Transmitter
clock
TX-EN, ETXD0 to ETXD3, TX-ER timing
reference signal
Receive clock
RX-DV, ERXD0 to ERXD3, RX-ER
timing reference signal
Transmit enable Signal indicating that transmit data on
ETXD0 to ETXD3 is ready
Transmit data
0 to 3
4-bit transmit data
Transmit error
Signal sending error status to another
port
Receive data
enable
Indicates that enable receive data on
ERXD0 to ERXD3 exist
Receive data
0 to 3
4-bit receive data
Receive error
Reports error state that occurred during
transfer of frame data
Carrier sense Carrier detection notification signal
Collision
Collision detection signal
Management
data clock
Reference clock signal for information
transfer by MDIO
Management Bidirectional signal for exchanging
data input/output management information between STA
and PHY
Rev. 2.00, 03/05, page 19 of 884