SH7615 Datasheet, PDF (274/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

BRSRL
Bit: 15
14
13
12
11
10
9
8
BSA15 BSA14 BSA13 BSA12 BSA11 BSA10 BSA9 BSA8
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
BSA7 BSA6 BSA5 BSA4 BSA3 BSA2 BSA1 BSA0
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W: R
R
R
R
R
R
R
R
The branch source registers (BRSR) comprise a set of four 32-bit read-only registers. The values
in these registers are used to calculate the address of the last instruction executed before a branch
when performing a PC trace. The BRSR registers form a FIFO (first-in first-out) queue for PC
trace use. The queue is shifted at each branch.
The BRSR registers are not initialized by a reset.
6.2.22 Branch Destination Registers (BRDR)
BRDRH
Bit: 15
14
13
12
11
10
9
8
BDA31 BDA30 BDA29 BDA28 BDA27 BDA26 BDA25 BDA24
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
BDA23 BDA22 BDA21 BDA20 BDA19 BDA18 BDA17 BDA16
Initial value: Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W: R
R
R
R
R
R
R
R
Rev. 2.00, 03/05, page 236 of 884