SH7615 Datasheet, PDF (433/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

9.2.12 Carrier Not Detect Counter Register (CNDCR)
Bit: 31
30
29
...
19
18
17
16
—
—
—
...
—
—
—
—
Initial value: 0
0
0
...
0
0
0
0
R/W: R
R
R
...
R
R
R
R
Bit: 15
14
13
12
11
10
9
8
CNDC15 CNDC14 CNDC13 CNDC12 CNDC11 CNDC10 CNDC9 CNDC8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
CNDC7 CNDC6 CNDC5 CNDC4 CNDC3 CNDC2 CNDC1 CNDC0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
CNDCR is a 16-bit counter that indicates the number of times the carrier could not be detected
while the preamble was being sent. When the value in this register reaches H'FFFF (65,535), the
count is halted. The counter value is cleared to 0 by a write to this register (the write value is
immaterial).
Bits 31 to 16—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 15 to 0—Carrier Not Detect Count 15 to 0 (CNDC15 to CNDC0): These bits indicate the
number of times the carrier was not detected.
Rev. 2.00, 03/05, page 395 of 884