SH7615 Datasheet, PDF (565/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

12.1.3 Input/Output Pins
Table 12.1 lists FRT I/O pins and their functions.
Table 12.1 Pin Configuration
Channel
Counter clock input pin
Output compare A output pin
Output compare B output pin
Input capture input pin
Pin
FTCI
FTOA
FTOB
FTI
I/O
Input
Output
Output
Input
Function
FRC counter clock input pin
Output pin for output compare A
Output pin for output compare B
Input pin for input capture
12.1.4 Register Configuration
Table 12.2 shows the FRT register configuration.
Table 12.2 Register Configuration
Register
Abbreviation R/W
Initial
Value Address
Timer interrupt enable register
TIER
Free-running timer control/status register FTCSR
R/W
H'01
R/(W)^*1 H'00
HFFFFFE10
HFFFFFE11
Free-running counter H
FRC H
R/W
H'00 HFFFFFE12
Free-running counter L
Output compare register A H
Output compare register A L
Output compare register B H
Output compare register B L
FRC L
OCRA H
OCRA L
OCRB H
OCRB L
R/W
H'00 HFFFFFE13
R/W
H'FF HFFFFFE14^*2
R/W
H'FF HFFFFFE15^*2
R/W
H'FF HFFFFFE14^*2
R/W
H'FF HFFFFFE15^*2
Timer control register
TCR
R/W
H'00 HFFFFFE16
Timer output compare control register TOCR
R/W
H'E0 HFFFFFE17
Input capture register H
FICR H
R
H'00 HFFFFFE18
Input capture register L
FICR L
R
H'00 HFFFFFE19
Notes: Use byte-size access for all registers.
1. Bits 7 to 1 are read-only. The only value that can be written is a 0, which is used to
clear flags. Bit 0 can be read or written.
2. OCRA and OCRB have the same address. The OCRS bit in TOCR is used to switch
between them.
Rev. 2.00, 03/05, page 527 of 884