SH7615 Datasheet, PDF (244/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

6.2.2 Break Address Mask Register A (BAMRA)
BAMRAH
Bit: 15
14
13
12
11
10
9
8
BAMA31 BAMA30 BAMA29 BAMA28 BAMA27 BAMA26 BAMA25 BAMA24
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
BAMA23 BAMA22 BAMA21 BAMA20 BAMA19 BAMA18 BAMA17 BAMA16
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
BAMRAL
Bit: 15
14
13
12
11
10
9
8
BAMA15 BAMA14 BAMA13 BAMA12 BAMA11 BAMA10 BAMA9 BAMA8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
BAMA7 BAMA6 BAMA5 BAMA4 BAMA3 BAMA2 BAMA1 BAMA0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Break address mask register A (BAMRA) consists of two 16-bit readable/writable registers: break
address mask register AH (BAMRAH) and break address mask register AL (BAMRAL).
BAMRAH specifies which bits of the break address set in BARAH are to be masked, and
BAMRAL specifies which bits of the break address set in BARAL are to be masked. BAMRAH
and BAMRAL are initialized to H'0000 by a power-on reset; after a manual reset, their values are
undefined.
BAMRAH Bits 15 to 0—Break Address Mask A31 to A16 (BAMA31 to BAMA16): These bits
specify whether or not corresponding channel A break address bits 31 to 16 (BAA31 to BAA16)
set in BARAH are to be masked.
BAMRAL Bits 15 to 0—Break Address Mask A15 to A0 (BAMA15 to BAMA0): These bits
specify whether or not corresponding channel A break address bits 15 to 0 (BAA15 to BAA0) set
in BARAL are to be masked.
Rev. 2.00, 03/05, page 206 of 884