SH7615 Datasheet, PDF (10/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Item
1.3.1 Pin Arrangement
Figure 1.2
HD6417615ARF and
HD6417615ARFV Pin
Arrangement (FP-208C,
FP-208CV)
Page Revisions (See Manual for Details)
14 _{Figure 1.2 title amended, package name amended}
(Before) FP-208C (Top view) → (After) FP-208C, FP-208CV
(Top view)
PVSS
157
PB10/SRXD2/TIOCA1
158
PB9/STCK2/TIOCB1/TCLKC
159
PB8/STS2/TIOCA2
160
PB7/STXD2/TIOCB2/TCLKD
161
PB6/SRCK1/SCK2
162
PB5/SRS1/RXD2
163
PB4/SRXD1/TXD2
164
PB3/STCK1/TIOCA0
165
PB2/STS1/TIOCB0
166
PVCC
167
PB1/STXD1/TIOCC0/TCLKA
168
PVSS
169
PB0/TIOCD0/TCLKB/WOL
170
PA13/SRCK0
171
PA12/SRS0
172
PA11/SRXD0
173
PA10/STCK0
174
PA9/STS0
175
PA8/STXD0
176
PA7/WDTOVF
177
PA6/FTCI
178
PVCC
179
PA5/FTI
180
PVSS
181
PA4/FTOA
182
CKPO/FTOB
183
PA2/LNKSTA
184
PA1/EXOUT
185
PA0
186
RX-ER
187
RX-DV
188
COL
189
CRS
190
PVSS
191
RX-CLK
192
PVCC
193
ERXD0
194
ERXD1
195
ERXD2
196
ERXD3
197
MDIO
198
MDC
199
PVCC
200
TX-CLK
201
PVSS
202
TX-EN
203
ETXD0
204
ETXD1
205
ETXD2
206
ETXD3
207
TX-ER
208
Figure 1.3
HD6417615ARBP and
HD6417615ARBPV Pin
Arrangement (BP-240A,
BP-240AV)
1.3.2 Pin Functions
Table 1.2 Pin Functions
1.3.3 Pin Multiplexing
Table 1.3 Pin
Multiplexing
15
18 to
20
22 to
27
Figure 1.3 added
Table 1.2 amended
Type
Symbol
I/O
Bus contro BUSHiZ
Input
Name
Bus high
impedance
Ethernet
controller
(EtherC)
ETXD0 to Output
ETXD3
Serial
RXD1, RXD2 Input
communi-
cation
interface with
FIFO (SCIF)
Transmit data
0 to 3
Receive data
input channel
1, 2
Function
Signal used in combination with WAIT
signal to place bus and strobe signals in
the high-impedance (HiZ) state without
ending the bus cycle
4-bit transmit data
SCIF channel 1 and 2 receive data input
pins
Table 1.3 amended
The pin numbers for the BP-240A and BP-240AV packages
are added.
Rev. 2.00, 03/05, page x of xxxviii