SH7615 Datasheet, PDF (648/925 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperH
RISC engine Family/SH7600 Series

Table 14.11 Receive Error Conditions
Receive Error
Overrun error
Framing error
Parity error
Abbreviation
ORER
FER
PER
Condition
Data Transfer
Next serial receive operation is Receive data is not transferred
completed while there are 16 from SCRSR to SCFRDR
receive data bytes in SCFRDR
Stop bit is 0
Receive data is transferred from
SCRSR to SCFRDR
Received data parity differs
from that (even or odd) set in
SCSMR
Receive data is transferred from
SCRSR to SCFRDR
Figure 14.9 shows an example of the operation for reception in asynchronous mode.
1
Serial
data
Start
bit
0 D0
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
D1
D7 0/1 1 0 D0 D1
D7 0/1 1
1
Idle state
(mark state)
RDF
FER
RXI interrupt
request
One frame
Data read and RDF
flag cleared to 0 by
RXI interrupt handler
ERI interrupt request
due to framing error
Figure 14.9 Example of SCIF Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit, LSB-First Transfer)
5. When modem control is enabled, the RTS signal is output when SCFRDR is empty. When
RTS is 0, reception is possible. When RTS is 1, this indicates that SCFRDR is full and
reception is not possible.
Figure 14.10 shows an example of the operation when modem control is used.
Rev. 2.00, 03/05, page 610 of 884